US 12,231,047 B2
Mode-transition architecture for buck-boost converter
Rajesh Karri, Visakhapatnam (IN); Arun Khamesra, Bangalore (IN); Pulkit Shah, Bangalore (IN); and Hariom Rai, Bangalore (IN)
Assigned to Cypress Semiconductor Corporation, San Jose, CA (US)
Filed by Cypress Semiconductor Corporation, San Jose, CA (US)
Filed on May 1, 2023, as Appl. No. 18/310,458.
Application 18/310,458 is a division of application No. 17/147,686, filed on Jan. 13, 2021, granted, now 11,658,573.
Claims priority of provisional application 63/074,296, filed on Sep. 3, 2020.
Claims priority of provisional application 63/074,270, filed on Sep. 3, 2020.
Prior Publication US 2023/0291314 A1, Sep. 14, 2023
Int. Cl. H02M 3/158 (2006.01); G01R 19/165 (2006.01); G06F 1/26 (2006.01); H02M 1/00 (2006.01); H02M 3/156 (2006.01)
CPC H02M 3/1582 (2013.01) [G01R 19/16552 (2013.01); G06F 1/266 (2013.01); H02M 1/0009 (2021.05); H02M 1/0025 (2021.05); H02M 3/1566 (2021.05)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
detecting, by a Universal Serial Bus (USB) controller for a USB Type-C device, a transition of a buck-boost converter from a first mode having a first duty cycle to a second mode having a second duty cycle that is less than the first duty cycle;
providing, by a slope compensation circuit of the USB controller, an output based on an input current of the buck-boost converter and a slope compensation current, the output comprising an error caused by the transition; and
controlling, by the USB controller, an offset output by the slope compensation circuit to nullify the error caused by the transition, wherein controlling the offset output by the slope compensation circuit comprises storing a charge in a capacitor of the slope compensation circuit during the first duty cycle and applying the charge during the second duty cycle.