| CPC H02M 3/072 (2021.05) [H02M 1/007 (2021.05); H02M 1/0074 (2021.05); H02M 1/0095 (2021.05); H02M 3/1586 (2021.05); H02M 1/0058 (2021.05)] | 30 Claims |

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1. A power converter circuit comprising:
a plurality of voltage splitting units (VSUs) coupled to a plurality of current splitting units (CSUs), the VSUs being connected to each other in series and the CSUs being connected to each other in parallel, each VSU being directly connected to a CSU without a capacitor in between, the power converter circuit configured to have an intermediate bus voltage (VBUS) between each VSU and its directly connected CSU, where the VBUS includes large voltage pulses relative to an average VBUS based on a switching frequency of the VSU;
the VSUs each having a fixed voltage conversion ratio and being operated at a lower frequency than the CSUs; and
the CSUs each having an adjustable voltage conversion ratio and being operated at a higher frequency than the VSUs.
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