US 12,230,938 B2
Optical semiconductor device
Hiromitsu Itamoto, Tokyo (JP); Akihiro Matsusue, Tokyo (JP); and Takuro Shinada, Tokyo (JP)
Assigned to Mitsubishi Electric Corporation, Tokyo (JP)
Appl. No. 17/620,418
Filed by Mitsubishi Electric Corporation, Tokyo (JP)
PCT Filed Oct. 25, 2019, PCT No. PCT/JP2019/042003
§ 371(c)(1), (2) Date Dec. 17, 2021,
PCT Pub. No. WO2021/079510, PCT Pub. Date Apr. 29, 2021.
Prior Publication US 2022/0352690 A1, Nov. 3, 2022
Int. Cl. H01S 5/042 (2006.01); H01S 5/023 (2021.01); H01S 5/0237 (2021.01); H01S 5/0239 (2021.01); H01S 5/026 (2006.01); H01S 5/06 (2006.01)
CPC H01S 5/042 (2013.01) [H01S 5/023 (2021.01); H01S 5/0239 (2021.01); H01S 5/0237 (2021.01); H01S 5/0265 (2013.01); H01S 5/0601 (2013.01)] 6 Claims
OG exemplary drawing
 
1. An optical semiconductor device comprising:
a submount;
a first conductive pattern provided on an upper surface of the submount;
a GND pattern provided on a lower surface of the submount;
a light emitting device;
a capacitor having a lower surface electrode bonded to the first conductive pattern with solder and an upper surface electrode connected to the light emitting device; and
a terminating resistor connected to the first conductive pattern,
wherein the first conductive pattern has a protruding portion which protrudes outside from the capacitor in planar view,
the protruding portion protrudes from two or more portions at an outer periphery of the capacitor,
a width of the protruding portion is narrower than a width of the two or more portions of the outer periphery of the capacitor,
the lower surface electrode is provided on a whole surface of a lower surface of a dielectric body of the capacitor.