US 12,230,729 B2
Photo-detection apparatus and photo-detection system
Kazuhiro Morimoto, Neuchâtel (CH); and Mahito Shinohara, Tokyo (JP)
Assigned to CANON KABUSHIKI KAISHA, Tokyo (JP)
Filed by CANON KABUSHIKI KAISHA, Tokyo (JP)
Filed on Nov. 6, 2023, as Appl. No. 18/502,777.
Application 18/502,777 is a continuation of application No. 17/486,444, filed on Sep. 27, 2021, granted, now 11,984,525.
Application 17/486,444 is a continuation of application No. 16/656,230, filed on Oct. 17, 2019, granted, now 11,158,755, issued on Oct. 26, 2021.
Application 16/656,230 is a continuation of application No. 15/721,492, filed on Sep. 29, 2017, granted, now 10,497,822, issued on Dec. 3, 2019.
Claims priority of application No. 2016-202052 (JP), filed on Oct. 13, 2016; and application No. 2017-146724 (JP), filed on Jul. 28, 2017.
Prior Publication US 2024/0072193 A1, Feb. 29, 2024
Int. Cl. H01L 31/107 (2006.01); B60W 30/00 (2006.01); G01S 7/4861 (2020.01); G01S 17/10 (2020.01); H01L 27/144 (2006.01); H01L 31/02 (2006.01); H01L 31/0352 (2006.01)
CPC H01L 31/107 (2013.01) [B60W 30/00 (2013.01); G01S 7/4861 (2013.01); G01S 17/10 (2013.01); H01L 27/1446 (2013.01); H01L 31/02005 (2013.01); H01L 31/02027 (2013.01); H01L 31/03529 (2013.01); B60W 2420/40 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A photodetection apparatus comprising:
a semiconductor substrate having a first surface and a second surface opposite to the first surface; and
a pixel unit having a plurality of pixels each including an avalanche diode, the plurality of pixels being arranged on the semiconductor substrate,
wherein the avalanche diode includes:
a first semiconductor region of a first conductivity type arranged in a first depth with respect to the first surface;
a second semiconductor region of a second conductivity type arranged in a second depth greater than the first depth with respect to the first surface;
a third semiconductor region arranged in a third depth greater than the second depth with respect to the first surface and configured to generate electric charge;
a fourth semiconductor region of the second conductivity type arranged between the third semiconductor regions of the respective avalanche diodes; and
a fifth semiconductor region of the second conductivity type arranged in a fourth depth greater than the third depth with respect to the first surface,
wherein the first semiconductor region and the second semiconductor region are configured so as to form a region where avalanche amplification occurs,
wherein an area of a region where the first semiconductor region and the second semiconductor region overlap is smaller than an area of the third semiconductor region in a plane view, and
wherein the fourth semiconductor region is electrically connected to the second semiconductor region and the fifth semiconductor region.