US 12,230,716 B2
Semiconductor structure with thin film transistor
Marcus Johannes Henricus Van Dal, Linden (BE); Gerben Doornbos, Kessel-Lo (BE); Georgios Vellianitis, Heverlee (BE); and Mauricio Manfrini, Zhubei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Sep. 3, 2021, as Appl. No. 17/466,148.
Claims priority of provisional application 63/195,895, filed on Jun. 2, 2021.
Prior Publication US 2022/0393033 A1, Dec. 8, 2022
Int. Cl. H01L 29/786 (2006.01); H01L 21/02 (2006.01); H01L 21/425 (2006.01); H01L 29/24 (2006.01); H01L 29/66 (2006.01); H10B 61/00 (2023.01); H10B 63/00 (2023.01)
CPC H01L 29/78618 (2013.01) [H01L 21/02565 (2013.01); H01L 21/425 (2013.01); H01L 29/24 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H10B 61/22 (2023.02); H10B 63/30 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
an interconnect structure;
an electrode layer formed over the interconnect structure;
a gate dielectric layer formed over the electrode layer;
an oxide semiconductor layer formed over the gate dielectric layer;
an indium-containing feature covering a surface of the oxide semiconductor layer and vertically overlapping the interconnect structure and the electrode layer; and
a source/drain contact formed over the indium-containing feature, wherein the source/drain contact comprises:
a conductive material; and
a liner surrounding sidewalls and a bottom surface of the conductive material,
wherein a bottom width of the liner is substantially equal to a bottom width of the indium-containing feature.