US 12,230,715 B2
Semiconductor device and method for manufacturing semiconductor device
Junichi Koezuka, Tochigi (JP); Toshinari Sasaki, Shinagawa (JP); Katsuaki Tochibayashi, Isehara (JP); and Shunpei Yamazaki, Setagaya (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed on Mar. 11, 2024, as Appl. No. 18/600,901.
Application 18/600,901 is a continuation of application No. 17/964,203, filed on Oct. 12, 2022, granted, now 11,935,959.
Application 17/964,203 is a continuation of application No. 16/897,586, filed on Jun. 10, 2020, granted, now 11,515,426, issued on Nov. 29, 2022.
Application 16/897,586 is a continuation of application No. 16/413,860, filed on May 16, 2019, granted, now 10,693,010, issued on Jun. 23, 2020.
Application 16/413,860 is a continuation of application No. 15/872,154, filed on Jan. 16, 2018, granted, now 10,347,768, issued on Jul. 9, 2019.
Application 15/872,154 is a continuation of application No. 15/450,391, filed on Mar. 6, 2017, granted, now 9,905,696, issued on Feb. 27, 2018.
Application 15/450,391 is a continuation of application No. 15/351,775, filed on Nov. 15, 2016, granted, now 9,780,219, issued on Oct. 3, 2017.
Application 15/351,775 is a continuation of application No. 14/861,289, filed on Sep. 22, 2015, granted, now 9,548,393, issued on Jan. 17, 2017.
Application 14/861,289 is a continuation of application No. 13/942,504, filed on Jul. 15, 2013, granted, now 9,184,297, issued on Nov. 10, 2015.
Claims priority of application No. 2012-161688 (JP), filed on Jul. 20, 2012.
Prior Publication US 2024/0222510 A1, Jul. 4, 2024
Int. Cl. H01L 29/786 (2006.01); H01L 27/12 (2006.01); H01L 27/146 (2006.01); H01L 29/66 (2006.01); G02F 1/133 (2006.01); G02F 1/1333 (2006.01); G02F 1/1339 (2006.01); G02F 1/1343 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); G06F 3/041 (2006.01); H01L 27/15 (2006.01); H10K 59/121 (2023.01); H10K 59/124 (2023.01)
CPC H01L 29/78606 (2013.01) [H01L 27/1225 (2013.01); H01L 27/1248 (2013.01); H01L 27/14616 (2013.01); H01L 29/66742 (2013.01); H01L 29/7869 (2013.01); G02F 1/13306 (2013.01); G02F 1/133345 (2013.01); G02F 1/1339 (2013.01); G02F 1/134309 (2013.01); G02F 1/13439 (2013.01); G02F 1/136227 (2013.01); G02F 1/1368 (2013.01); G02F 2201/121 (2013.01); G06F 3/0412 (2013.01); H01L 27/14612 (2013.01); H01L 27/15 (2013.01); H10K 59/1213 (2023.02); H10K 59/124 (2023.02)] 18 Claims
OG exemplary drawing
 
2. A semiconductor device comprising:
a substrate;
a first insulating film over the substrate;
an oxide semiconductor film over the first insulating film;
a source electrode and a drain electrode over and electrically connected to the oxide semiconductor film;
a second insulating film over the source electrode and the drain electrode;
a third insulating film over the second insulating film; and
a gate electrode over the oxide semiconductor film,
wherein the source electrode has a stacked structure comprising a first conductive film, a second conductive film over the first conductive film, and a third conductive film over the second conductive film,
wherein the drain electrode has a stacked structure comprising a fourth conductive film, a fifth conductive film over the fourth conductive film, and a sixth conductive film over the fifth conductive film, and
wherein the second insulating film comprises a plurality of void regions.