US 12,230,710 B2
LDMOS with field plates
Shinichirou Wada, Tokyo (JP)
Assigned to ABLIC Inc., Tokyo (JP)
Appl. No. 17/312,663
Filed by ABLIC Inc., Tokyo (JP)
PCT Filed Oct. 11, 2019, PCT No. PCT/JP2019/040216
§ 371(c)(1), (2) Date Jun. 10, 2021,
PCT Pub. No. WO2020/129375, PCT Pub. Date Jun. 25, 2020.
Claims priority of application No. 2018-237115 (JP), filed on Dec. 19, 2018.
Prior Publication US 2022/0052197 A1, Feb. 17, 2022
Int. Cl. H01L 21/00 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/36 (2006.01); H01L 29/40 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/7835 (2013.01) [H01L 29/0847 (2013.01); H01L 29/1095 (2013.01); H01L 29/36 (2013.01); H01L 29/404 (2013.01); H01L 29/7816 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first electroconductive type body region formed on a main surface of a semiconductor substrate;
a second electroconductive type source region formed on a surface of the body region;
a second electroconductive type drift region formed so as to have contact with the body region;
a second electroconductive type drain region formed on the drift region;
a first electroconductive type buried region having contact with the body region and formed below the drift region;
a gate electrode formed above the body region between the source region and the drift region and above the drift region nearer to the source region via a gate insulating film;
a first field plate that extends from the gate electrode toward the drain region and that is formed above the drift region via a first insulating film, a bottom surface of the first insulating film being lower than a top surface of the second electroconductive type drift region; and
a second field plate that has contact with the source region or the gate electrode and that is formed above the first field plate via a second insulating film,
wherein a distance between the buried region and the drain region is shorter than a distance between the first field plate and the drain region, and longer than a distance between the second field plate and the drain region,
wherein the semiconductor substrate has a first electroconductive type SOI layer formed with a buried insulating layer therebetween, and the first electroconductive type SOI layer separates the buried insulating layer from the first electroconductive type buried region and the second electroconductive type drift region.