US 12,230,686 B2
Device having increased forward biased safe operating area using source segments with different threshold voltages and method of operating thereof
Praveen Shenoy, Chandler, AZ (US)
Assigned to Infineon Technologies Americas Corp., El Segundo, CA (US)
Filed by Infineon Technologies Americas Corp., El Segundo, CA (US)
Filed on Apr. 20, 2021, as Appl. No. 17/235,448.
Application 17/235,448 is a continuation in part of application No. 16/291,537, filed on Mar. 4, 2019, granted, now 10,998,403.
Prior Publication US 2021/0242321 A1, Aug. 5, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/423 (2006.01); H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/739 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/4238 (2013.01) [H01L 27/088 (2013.01); H01L 29/0696 (2013.01); H01L 29/0847 (2013.01); H01L 29/086 (2013.01); H01L 29/0865 (2013.01); H01L 29/0869 (2013.01); H01L 29/4236 (2013.01); H01L 29/7802 (2013.01); H01L 29/7813 (2013.01); H01L 29/7395 (2013.01); H01L 29/7397 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a plurality of gate stripes arranged in parallel columns on an upper surface of the device; and
a plurality of source segments arranged in a checkered pattern between the plurality of gate stripes, wherein:
a first edge of each gate stripe overlaps or is proximate to a first subset of the plurality of source segments and a second edge of each gate stripe overlaps or is proximate to a second subset of the plurality of source segments,
a first group of the plurality of source segments has a first threshold voltage,
a second group of the plurality of source segments has a second threshold voltage higher than the first threshold voltage,
a ratio of areas of the source segments of the second group to areas of the source segments of the first group varies across the device, wherein the ratio of the areas of the source segments of the second group to the areas of the source segments of the first group is higher in an interior portion of the device than in a peripheral portion of the device.
 
7. A power semiconductor device comprising:
a semiconductor die having a center region and an edge region;
a plurality of source segments disposed on the semiconductor die; and
a plurality of concentric zones extending from the center region to the edge region of the semiconductor die, wherein each zone comprises source segments having a first threshold voltage and source segments having a second threshold voltage, wherein:
the second threshold voltage is higher than the first threshold voltage, and
a ratio of an area of source segments having the second threshold voltage to an area of source segments having the first threshold voltage is higher in the center region than in the edge region.
 
17. A method of operating a power semiconductor device, the method comprising:
applying a voltage to a plurality of gate stripes arranged in parallel columns on an upper surface of the device; and
causing a current to flow through a plurality of source segments arranged in a checkered pattern between the plurality of gate stripes, wherein:
a first edge of each gate stripe overlaps or is proximate to a first subset of the plurality of source segments and a second edge of each gate stripe overlaps or is proximate to a second subset of the plurality of source segments,
a first group of the plurality of source segments has a first threshold voltage,
a second group of the plurality of source segments has a second threshold voltage higher than the first threshold voltage,
a ratio of areas of the source segments of the second group to areas of the source segments of the first group varies across the device, and
the ratio of the areas of the source segments of the second group to the areas of the source segments of the first group is higher in an interior portion of the device than in a peripheral portion of the device.