US 12,230,683 B2
Thin film transistor having a semiconductor layer comprising a plurality of semiconductor branches
Lizhong Wang, Beijing (CN); Ce Ning, Beijing (CN); Hehe Hu, Beijing (CN); Tianmin Zhou, Beijing (CN); and Jipeng Song, Beijing (CN)
Assigned to BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/755,380
Filed by BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed May 19, 2021, PCT No. PCT/CN2021/094512
§ 371(c)(1), (2) Date Apr. 30, 2022,
PCT Pub. No. WO2022/001442, PCT Pub. Date Jan. 6, 2022.
Claims priority of application No. 202010598519.X (CN), filed on Jun. 28, 2020.
Prior Publication US 2022/0344480 A1, Oct. 27, 2022
Int. Cl. H01L 29/786 (2006.01); H01L 29/417 (2006.01)
CPC H01L 29/41733 (2013.01) [H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A thin film transistor, comprising:
a source electrode, comprising a source electrode wiring and a plurality of source electrode branches;
a drain electrode, comprising a drain electrode wiring and a plurality of drain electrode branches;
a gate insulated from the source electrode and the drain electrode;
and a semiconductor layer in contact with and connected to the plurality of source electrode branches and the plurality of drain electrode branches, comprising a plurality of semiconductor branches;
wherein the plurality of source electrode branches, and the plurality of drain electrode branches are in contact with the plurality of semiconductor branch, and are divided into a plurality of cells, wherein each cell comprises M source electrode branches, N drain electrode branches and Q semiconductor branches, and M, N and Q are integers greater than or equal to 1;
the source electrode wiring and the drain electrode wiring are arranged in parallel and spaced apart, a number of the source electrode wiring is m, a number of the drain electrode wiring is n, one of m and n is an integer greater than or equal to 2, another of m and n is an integer greater than or equal to 1;
a plurality of the cells are arranged in a region between the source electrode wiring and an adjacent the drain electrode wiring, so as to arrange the plurality of the cells into at least two cell lines, wherein the source electrode branch of each cell in each cell line is electrically connected to the same one of the source electrode wiring, and the drain electrode branch of each cell in each cell line is electrically connected to the same one of the drain electrode wiring.