US 12,230,668 B2
Method for manufacturing semiconductor structure, semiconductor structure, and memory
Yonghao Du, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Oct. 28, 2021, as Appl. No. 17/452,644.
Application 17/452,644 is a continuation of application No. PCT/CN2021/106921, filed on Jul. 16, 2021.
Claims priority of application No. 202011057546.2 (CN), filed on Sep. 29, 2020.
Prior Publication US 2022/0102481 A1, Mar. 31, 2022
Int. Cl. H01L 49/02 (2006.01)
CPC H01L 28/60 (2013.01) [H01L 28/56 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor structure, comprising:
providing a substrate;
forming a lower electrode on the substrate;
forming a capacitor dielectric layer on a surface of the lower electrode, wherein the capacitor dielectric layer comprises at least one zirconium oxide layer;
subjecting the capacitor dielectric layer with a microwave annealing treatment performed in a copper chamber to convert a crystal phase of zirconium oxide to a tetragonal crystal phase; and
forming an upper electrode on a surface of the capacitor dielectric layer.