US 12,230,647 B2
Display device, manufacturing method of display device, and electronic device
Shunpei Yamazaki, Tokyo (JP); Yoshiharu Hirakata, Kanagawa (JP); Takashi Hamada, Kanagawa (JP); Kohei Yokoyama, Kanagawa (JP); Yasuhiro Jinbo, Kanagawa (JP); Tetsuji Ishitani, Kanagawa (JP); and Daisuke Kubota, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Atsugi (JP)
Filed on Nov. 17, 2023, as Appl. No. 18/512,392.
Application 16/522,182 is a division of application No. 14/922,658, filed on Oct. 26, 2015, granted, now 10,367,014, issued on Jul. 30, 2019.
Application 18/512,392 is a continuation of application No. 17/246,788, filed on May 3, 2021, granted, now 11,824,068.
Application 17/246,788 is a continuation of application No. 16/522,182, filed on Jul. 25, 2019, granted, now 11,075,232, issued on Jul. 27, 2021.
Claims priority of application No. 2014-219635 (JP), filed on Oct. 28, 2014.
Prior Publication US 2024/0088172 A1, Mar. 14, 2024
Int. Cl. H01L 27/12 (2006.01); G02F 1/1333 (2006.01); G02F 1/1335 (2006.01); G02F 1/1339 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); H01L 29/786 (2006.01); H10K 50/842 (2023.01); H10K 50/844 (2023.01); H10K 59/38 (2023.01); H10K 59/40 (2023.01); H10K 71/50 (2023.01); H10K 102/00 (2023.01)
CPC H01L 27/1262 (2013.01) [G02F 1/133345 (2013.01); G02F 1/133512 (2013.01); G02F 1/1339 (2013.01); G02F 1/136213 (2013.01); G02F 1/1368 (2013.01); H01L 27/1218 (2013.01); H01L 27/1225 (2013.01); H01L 27/1255 (2013.01); H01L 29/78648 (2013.01); H10K 50/8426 (2023.02); H10K 50/8428 (2023.02); H10K 50/844 (2023.02); H10K 59/38 (2023.02); H10K 59/40 (2023.02); H10K 71/50 (2023.02); H10K 2102/00 (2023.02)] 6 Claims
OG exemplary drawing
 
1. An electronic device comprising:
a first substrate;
a first adhesive layer provided on a first surface side of the first substrate;
a second substrate;
a second adhesive layer provided on a first surface side of the second substrate; and
an element layer provided between the first adhesive layer and the second adhesive layer,
wherein the element layer comprises:
a pixel portion; and
a peripheral circuit portion,
wherein the pixel portion comprises:
a first transistor;
a capacitor; and
a light-emitting element,
wherein the peripheral circuit portion comprises a second transistor,
wherein the electronic device further comprises:
a first conductive layer comprising a region configured to function as a gate electrode of the first transistor;
a second conductive layer comprising a region configured to function as a gate electrode of the second transistor;
a first insulating layer over and in contact with the first conductive layer and the second conductive layer;
a second insulating layer over the first insulating layer;
a first semiconductor layer over the second insulating layer, the first semiconductor layer comprising a channel formation region of the first transistor;
a second semiconductor layer over the second insulating layer, the second semiconductor layer comprising a channel formation region of the second transistor;
a third insulating layer over the first semiconductor layer and the second semiconductor layer; and
a fourth insulating layer over and in contact with the first semiconductor layer, the second semiconductor layer, and the second insulating layer,
wherein, in a plan view, in a region between an edge of the second substrate and the second transistor, the first insulating layer comprises a first region not overlapping with the second insulating layer,
wherein the first insulating layer comprises a second region overlapping with the first conductive layer,
wherein a thickness of the first region is thinner than a thickness of the second region, and
wherein the third insulating layer is in contact with the first region.