| CPC H01L 27/124 (2013.01) [G02F 1/136227 (2013.01); G02F 1/136209 (2013.01); G02F 1/136286 (2013.01); H01L 29/78633 (2013.01)] | 20 Claims | 

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               1. A display panel, comprising: 
            a substrate; 
                a first metal layer disposed on a side of the substrate; 
                a second metal layer disposed on a side of the first metal layer away from the substrate and comprising a plurality of gate electrodes and a plurality of sets of source and drain electrodes arranged in the same layer as the gate electrodes; 
                an active layer located between the first metal layer and the second metal layer; 
                a buffer layer located between the first metal layer and the active layer; 
                an interlayer dielectric layer located between the buffer layer and the second metal layer metal layer; and 
                a plurality of data lines, wherein each of the data lines is disposed in the same layer as the first metal layer and is electrically connected to the source and drain electrodes; 
                wherein the interlayer dielectric layer comprises a plurality of first via holes and a plurality of second via holes, the buffer layer comprises a plurality of third via holes, and each set of the source and drain electrodes comprising the source electrode disposed opposite to the drain electrode, wherein each of the first via holes is located extending through a corresponding one of the third via holes, each of the source electrodes is electrically connected to the data line through the first via hole and the third via hole, and the source electrode is electrically connected to the active layer through the second via hole; and wherein an extending direction of a connection line defined between the first via hole and the second via hole corresponding to a same source electrode is parallel to an extending direction of the data line. 
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