US 12,230,634 B2
Semiconductor devices and methods of fabricating the same
Ming-Shuan Li, Hsinchu County (TW); Tsung-Lin Lee, Hsinchu (TW); and Chih Chieh Yeh, Taipei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Sep. 2, 2021, as Appl. No. 17/465,443.
Claims priority of provisional application 63/156,494, filed on Mar. 4, 2021.
Prior Publication US 2022/0285346 A1, Sep. 8, 2022
Int. Cl. H01L 27/092 (2006.01); H01L 21/02 (2006.01); H01L 21/8238 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 27/092 (2013.01) [H01L 21/0259 (2013.01); H01L 21/823807 (2013.01); H01L 21/823878 (2013.01); H01L 29/0665 (2013.01); H01L 29/42392 (2013.01); H01L 29/66742 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a first plurality of channel members over a substrate;
a first gate structure wrapping around each of the first plurality of channel members; and
a dielectric fin structure disposed adjacent to the first gate structure, the dielectric fin structure comprising:
a first dielectric layer disposed over the substrate and in direct contact with the first gate structure,
a second dielectric layer disposed over the first dielectric layer, wherein a carbon concentration of the second dielectric layer is greater than a carbon concentration of the first dielectric layer,
a third dielectric layer disposed over the second dielectric layer and spaced apart from the first dielectric layer and the first gate structure by the second dielectric layer, and
a first isolation feature disposed directly over the third dielectric layer.