US 12,230,624 B2
Integrated circuit with mixed row heights
Kam-Tou Sio, Zhubei (TW); Jiann-Tyng Tzeng, Hsin-Chu (TW); Chung-Hsing Wang, Hsin-Chu (TW); and Yi-Kan Cheng, Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Aug. 10, 2023, as Appl. No. 18/232,759.
Application 18/232,759 is a continuation of application No. 17/585,402, filed on Jan. 26, 2022, granted, now 11,769,766.
Application 17/585,402 is a continuation of application No. 16/883,740, filed on May 26, 2020, granted, now 11,282,829.
Application 16/883,740 is a continuation in part of application No. 16/196,434, filed on Nov. 20, 2018, granted, now 11,152,348.
Claims priority of provisional application 62/591,358, filed on Nov. 28, 2017.
Prior Publication US 2024/0006406 A1, Jan. 4, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 27/02 (2006.01); H01L 27/092 (2006.01); G06F 111/20 (2020.01)
CPC H01L 27/0207 (2013.01) [H01L 27/0924 (2013.01); G06F 2111/20 (2020.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit structure, comprising:
a plurality of first cell rows extending in a first direction, wherein the first cell row comprises a first plurality of active regions each of which continuously extends across the first cell row in the first direction, and each of first plurality of active regions comprises a first fin of a fin field effect transistor (FinFET) and wherein a number of first fins changes along the first direction, wherein each of the plurality of first cell rows comprises a respective first plurality of cells disposed therein; and
a plurality of second cell rows extending in the first direction, wherein the second cell row comprises a second plurality of active regions each of which continuously extends across the second cell row in the first direction, and each of second plurality of active regions comprises a second fin of a FinFET and wherein a number of second fins changes along the first direction, wherein each of the plurality of second cell rows comprises a respective second plurality of cells disposed therein, wherein each cell of the plurality of first cell rows is vertically adjacent to at least one cell from the plurality of second cell rows, wherein at least two rows of the plurality of first cell rows have a first row height, a first row width, and a different number of cells, and wherein at least two rows of the plurality of second cell rows have a second row height different from the first row height, a second row width that is same as the first row width, and a different number of cells.