US 12,230,615 B2
Semiconductor packages with vertical passive components
Jiraphat Charoenratpratoom, Bangkok (TH); Phongsak Sawasdee, Bangkok (TH); and Wannasat Panphrom, Bangkok (TH)
Assigned to UTAC Headquarters Pte. Ltd., Singapore (SG)
Filed by UTAC Headquarters Pte. Ltd., Singapore (SG)
Filed on Dec. 22, 2021, as Appl. No. 17/558,592.
Claims priority of provisional application 63/131,806, filed on Dec. 30, 2020.
Prior Publication US 2022/0208746 A1, Jun. 30, 2022
Int. Cl. H01L 25/16 (2023.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01)
CPC H01L 25/16 (2013.01) [H01L 23/49524 (2013.01); H01L 24/40 (2013.01); H01L 23/3121 (2013.01); H01L 23/49513 (2013.01); H01L 24/32 (2013.01); H01L 24/41 (2013.01); H01L 24/48 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/40145 (2013.01); H01L 2224/40177 (2013.01); H01L 2224/40195 (2013.01); H01L 2224/4118 (2013.01); H01L 2224/48177 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a package substrate having top and bottom major package substrate surfaces, the top major package substrate surface includes an active package surface configured with a component attach region and terminal pads;
a component mounted onto the component attach region of the active package surface, the component is electrically coupled to the terminal pads;
a passive component with opposing first and second passive component terminals, wherein the passive component is attached to the package substrate in a vertical configuration comprising,
the first passive component terminal attached to one terminal pad of the terminal pads, and
the second passive component terminal is distal from the top major package substrate surface; and
an encapsulant, the encapsulant forms an encapsulated package.