	US 12,230,607 B2
	Semiconductor device including power management die in a stack and methods of forming the same
Jen-Yuan Chang, Hsinchu (TW); and Chia-Ping Lai, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Limited, Hsinchu (TW)
Filed on Sep. 17, 2021, as Appl. No. 17/477,620.
Claims priority of provisional application 63/168,363, filed on Mar. 31, 2021.
Prior Publication US 2022/0320045 A1, Oct. 6, 2022
Int. Cl. H01L 25/065 (2023.01); G06F 1/3203 (2019.01); H01L 23/538 (2006.01)

CPC H01L 25/0657 (2013.01) [G06F 1/3203 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01)]

20 Claims

1. A semiconductor device comprising:

a first semiconductor die that operates at a first power;

a second semiconductor die in a stack on the first semiconductor die that operates at a second power different than the first power; and

a power management semiconductor die in the stack that provides the first power to the first semiconductor die through a first via and provides the second power to the second semiconductor die through a second via, wherein the power management semiconductor die comprises:

a BCD area including a bipolar section, a CMOS section and a DMOS section; and

a core area including a plurality of processing elements adjacent the BCD area and having a size less than a size of the BCD area.