US 12,230,604 B2
Package comprising stacked integrated devices with overhang
Krishna Vemuri, San Diego, CA (US); and Jinseong Kim, Escondido, CA (US)
Assigned to QUALCOMM INCORPORATED, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Jul. 14, 2021, as Appl. No. 17/375,931.
Prior Publication US 2023/0019333 A1, Jan. 19, 2023
Int. Cl. H01L 25/065 (2023.01); H01L 25/00 (2006.01)
CPC H01L 25/0652 (2013.01) [H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06572 (2013.01); H01L 2225/06586 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A package comprising:
a substrate;
a first integrated device comprising a first front side and a first back side,
wherein the first back side includes a first die substrate, and
wherein the front side of the first integrated device is coupled to a first side of the substrate through a first plurality of solder interconnects;
an adhesive coupled to the first back side of the first integrated device;
a second integrated device coupled to the first integrated device through the adhesive,
wherein a portion of the second integrated device overhangs over the first integrated device,
wherein the second integrated device is configured to be electrically coupled to the substrate,
wherein the second integrated device includes a second front side and a second back side,
wherein the second back side includes a second die substrate, and
wherein the adhesive directly touches (i) the first back side of the first integrated device and (ii) the second front side of the second integrated device;
an encapsulation layer at least partially encapsulating the first integrated device and the second integrated device, wherein the encapsulation layer is different from the adhesive,
wherein the second integrated device is coupled to the substrate through at least one solder interconnect and at least one pillar interconnect,
wherein the at least one solder interconnect is separate from the first plurality of solder interconnects,
wherein the at least one pillar interconnect is coupled to and touching the substrate, and
wherein the at least one solder interconnect is coupled to and touching the second integrated device and the at least one pillar interconnect.