US 12,230,601 B2
High power module package structures
Seungwon Im, Seoul (KR); JooYang Eom, Gimpo-si (KR); Inpil Yoo, Unterhaching (DE); and Oseob Jeon, Seoul (KR)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Feb. 8, 2022, as Appl. No. 17/650,265.
Prior Publication US 2023/0253362 A1, Aug. 10, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 23/495 (2006.01); H01L 25/065 (2023.01)
CPC H01L 24/83 (2013.01) [H01L 23/49568 (2013.01); H01L 23/49575 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 25/0655 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/8334 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A package, comprising:
a first direct bonded metal (DBM) substrate disposed parallel to a second DBM substrate a distance apart to define a space between the first DBM substrate and the second DBM substrate;
at least a semiconductor die disposed in the space, the semiconductor die being thermally coupled directly to the first DBM substrate by a first adhesive layer without an intervening spacer block between the semiconductor die and the first DBM substrate, and being thermally coupled directly to the second DBM substrate by a second adhesive layer without an intervening spacer block between the semiconductor die and the second DBM substrate; and
a leadframe having a first portion disposed in the space and a second portion disposed outside the space, the first portion having a height that is less than a height of the second portion.