US 12,230,589 B2
Semiconductor package
Chi-Yang Yu, Taoyuan (TW); Jung-Wei Cheng, Hsinchu (TW); Yu-Min Liang, Taoyuan (TW); Jiun-Yi Wu, Taoyuan (TW); Yen-Fu Su, Hsinchu (TW); Chien-Chang Lin, New Taipei (TW); and Hsin-Yu Pan, Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 30, 2023, as Appl. No. 18/325,136.
Application 18/325,136 is a continuation of application No. 17/185,944, filed on Feb. 25, 2021, granted, now 11,705,408.
Prior Publication US 2023/0307385 A1, Sep. 28, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/58 (2006.01); H01L 23/00 (2006.01); H01L 23/16 (2006.01); H01L 23/31 (2006.01)
CPC H01L 23/585 (2013.01) [H01L 23/16 (2013.01); H01L 23/3121 (2013.01); H01L 24/13 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/73204 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a substrate;
a semiconductor device disposed on the substrate; and
a ring structure disposed on the substrate and surrounding the semiconductor device, the ring structure comprising:
a first ring-shaped portion disposed on the substrate;
a second ring-shaped portion extending laterally from an outer sidewall of the first ring-shaped portion; and
a bonding layer between the first ring-shaped portion of the ring structure and the substrate, wherein the second ring-shaped portion is spaced apart from the bonding layer.