US 12,230,587 B2
Semiconductor device with crack-preventing structure
Minjung Choi, Suwon-si (KR); Yeonjin Lee, Suwon-si (KR); Jeonil Lee, Suwon-si (KR); and Jongmin Lee, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Mar. 28, 2022, as Appl. No. 17/706,013.
Claims priority of application No. 10-2021-0114248 (KR), filed on Aug. 27, 2021.
Prior Publication US 2023/0067386 A1, Mar. 2, 2023
Int. Cl. H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/58 (2006.01)
CPC H01L 23/562 (2013.01) [H01L 23/481 (2013.01); H01L 23/5226 (2013.01); H01L 23/528 (2013.01); H01L 23/585 (2013.01); H01L 21/78 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor substrate including a chip area and a first scribe lane area;
a low-k layer on the semiconductor substrate;
a first trench area in the first scribe lane area, the first trench area comprising a trench;
an interlayer insulating layer on the low-k layer;
a first metal liner in the first scribe lane area, the first metal liner extending vertically and continuously from the semiconductor substrate through the low-k layer and the interlayer insulating layer along a sidewall of the trench; and
a first gap-fill insulating layer in the first trench area and vertically extending from the semiconductor substrate through the low-k layer and the interlayer insulating layer to expose an upper surface of the first gap-fill insulating layer through the interlayer insulating layer,
wherein the first metal liner covers a side surface of the first gap-fill insulating layer and is disposed between the first gap-fill insulating layer and the low-k layer and between the first gap-fill insulating layer and the interlayer insulating layer, and
wherein a lower surface of the first gap-fill insulating layer contacts the semiconductor substrate.