| CPC H01L 23/5384 (2013.01) [H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 25/0657 (2013.01)] | 20 Claims |
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1. A carrier structure, comprising:
semiconductor chip stack structures; and
a carrier tape including a plurality of pockets respectively accommodating the semiconductor chip stack structures,
wherein:
each of the semiconductor chip stack structures includes:
a base chip;
a first through-via penetrating through the base chip;
a plurality of semiconductor chips stacked on the base chip in a first direction, perpendicular to an upper surface of the base chip;
a second through-via respectively penetrating through semiconductor chips below at least an uppermost semiconductor chip among the plurality of semiconductor chips;
connection members between the base chip and a lowermost semiconductor chip among the plurality of semiconductor chips and between the plurality of semiconductor chips; and
a molding member covering side surfaces of the plurality of semiconductor chips on the base chip,
each of the plurality of pockets includes a bottom surface, first sidewalls in four corner regions of each of the plurality of pockets, and second sidewalls between adjacent first sidewalls,
each of the first sidewalls has a first portion having a first inclination angle and a second portion on the first portion and having a second inclination angle, the second inclination angle being greater than the first inclination angle, and
vertices of lower surfaces of the semiconductor chip stack structures are in contact with the first sidewalls.
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