US 12,230,570 B2
Integrated circuit with buried power rail and methods of manufacturing the same
Joon Goo Hong, Austin, TX (US); Kang-ill Seo, Springfield, VA (US); and Mark S. Rodder, Dallas, TX (US)
Assigned to Samsung Electronics Co., Ltd., Yongin-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jan. 12, 2022, as Appl. No. 17/574,073.
Application 17/574,073 is a division of application No. 16/562,291, filed on Sep. 5, 2019, granted, now 11,233,008.
Claims priority of provisional application 62/863,606, filed on Jun. 19, 2019.
Prior Publication US 2022/0139835 A1, May 5, 2022
Int. Cl. H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 29/06 (2006.01)
CPC H01L 23/5286 (2013.01) [H01L 21/76877 (2013.01); H01L 23/53257 (2013.01); H01L 29/0649 (2013.01)] 16 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a first semiconductor substrate, the first semiconductor substrate being a bare semiconductor wafer;
a first dielectric layer on the first semiconductor substrate;
buried power rails accommodated in the first dielectric layer;
a second dielectric layer on the first dielectric layer and the buried power rails;
a third dielectric layer on the second dielectric layer;
a donor wafer on the third dielectric layer; and
a plurality of active devices, vias, and metal interconnects on or in the donor wafer.