US 12,230,548 B2
Semiconductor device
Yuri Kunishige, Tokyo (JP); and Hiroyuki Nakano, Tokyo (JP)
Assigned to Mitsubishi Electric Corporation, Tokyo (JP)
Appl. No. 17/753,719
Filed by Mitsubishi Electric Corporation, Tokyo (JP)
PCT Filed Oct. 23, 2019, PCT No. PCT/JP2019/041486
§ 371(c)(1), (2) Date Mar. 11, 2022,
PCT Pub. No. WO2021/079427, PCT Pub. Date Apr. 29, 2021.
Prior Publication US 2022/0344229 A1, Oct. 27, 2022
Int. Cl. H01L 23/58 (2006.01); H01L 23/31 (2006.01); H01L 29/16 (2006.01); H01L 29/66 (2006.01)
CPC H01L 23/3107 (2013.01) [H01L 29/1608 (2013.01); H01L 29/66545 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor substrate;
an electrode or a wire disposed on the semiconductor substrate;
a main protective film disposed on the semiconductor substrate to cover the electrode or the wire, the main protective film having a chamfer at each of corners of the semiconductor substrate in plan view; and
a dummy protective film independently disposed at each of the corners of the semiconductor substrate, the dummy protective film being disposed outside the chamfer to be spaced from the main protective film.