| CPC H01L 21/324 (2013.01) [H01L 21/02057 (2013.01); H01L 21/02068 (2013.01); H01L 21/28518 (2013.01); H01L 21/7624 (2013.01); H01L 29/401 (2013.01); H01L 29/665 (2013.01); H01L 29/66568 (2013.01); H01L 29/78 (2013.01); H01L 29/66545 (2013.01); H01L 29/66606 (2013.01)] | 7 Claims |

|
1. A method for fabricating a semiconductor device:
forming a gate structure on a substrate, wherein the substrate comprises a trap rich layer having oxygen clusters;
forming a source/drain region adjacent to the gate structure;
performing a first cleaning process;
performing a first rapid thermal anneal (RTA) process to remove oxygen clusters in the trap rich layer of the substrate after forming the source/drain region, wherein the first RTA process is between 560° C. to 700° C.;
forming a metal layer on the source/drain region; and
transforming the metal layer into a silicide layer.
|