select, through the control logic, a memory block from the one or more memory blocks and select, through the control logic, a word line of the memory block corresponding to a target memory cell of the plurality of memory cells to be read, each memory cell in a same row of the array with the target memory cell being coupled to the selected word line;

in a first read operation, apply a first read voltage to the selected word line and a first pass voltage to each of unselected word lines, wherein the selected word line corresponds to the target memory cell to be read, and the unselected word lines comprise first unselected word lines comprising one or more word lines adjacent to the selected word line, and second unselected word lines comprising remaining unselected word lines;

upon determining that the first read operation on the target memory cell has failed as a failed first read operation, start a second read operation on the target memory cell;

in the second read operation upon determining that the first read operation has failed, during a first time period after the failed first read operation, apply a second pass voltage to the first unselected word lines each coupling each memory cell in a same row of the array with a corresponding first unselected word line; and

in the second read operation upon determining that the first read operation has failed, during the first time period after the failed first read operation, apply the first pass voltage that was previously applied in the failed first read operation to the second unselected word lines,

wherein the second pass voltage is higher than the first pass voltage.