US 12,230,201 B2
Pixel circuit and driving method thereof, display substrate and display apparatus
Tiaomei Zhang, Beijing (CN); and Dan Cao, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 18/027,128
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Apr. 19, 2022, PCT No. PCT/CN2022/087747
§ 371(c)(1), (2) Date Mar. 20, 2023,
PCT Pub. No. WO2023/201535, PCT Pub. Date Oct. 26, 2023.
Prior Publication US 2024/0347000 A1, Oct. 17, 2024
Int. Cl. G09G 3/3233 (2016.01)
CPC G09G 3/3233 (2013.01) [G09G 2310/061 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0247 (2013.01); G09G 2330/021 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A pixel circuit, configured to drive a light emitting element to emit light, wherein:
the pixel circuit comprises: a first node control sub-circuit, a second node control sub-circuit, a light emitting control sub-circuit and a driving sub-circuit; a working process of the pixel circuit comprises a first initialization stage, a data writing stage, a second initialization stage and a light emitting stage;
the first node control sub-circuit is electrically connected with a first power supply terminal, a first reset signal terminal, a first initial signal terminal, a scanning signal terminal, a data signal terminal, a first node, a second node and a third node respectively, and is configured to provide a signal of the first initial signal terminal to the first node under control of the first reset signal terminal, provide a signal of the third node to the first node and a signal of the data signal terminal to the second node under control of the scanning signal terminal;
the second node control sub-circuit is electrically connected with a second reset signal terminal, a second initial signal terminal and a fourth node respectively, and is configured to provide a signal of the second initial signal terminal to the fourth node under control of the second reset signal terminal;
the driving sub-circuit is electrically connected with the first node, the second node and the third node respectively, and is configured to provide a driving current to the third node under control of the first node and the second node;
the light emitting control sub-circuit is electrically connected with a light emitting signal terminal, the first power supply terminal, the second node, the third node and the fourth node respectively, and is configured to provide a signal of the first power supply terminal to the second node and a signal of the third node to the fourth node under control of the light emitting signal terminal;
the light emitting element is electrically connected with the fourth node and a second power supply terminal respectively;
the second initialization stage is between the data writing stage and the light emitting stage, and a signal of the second reset signal terminal is an effective level signal in the second initialization stage, and the signal of the second reset signal terminal and a signal of the light emitting signal terminal are mutually inverted signals in the second initialization stage;
the first node control sub-circuit comprises a first transistor, a second transistor, a fourth transistor and a capacitor, and the capacitor comprises a first plate and a second plate; the driving sub-circuit comprises a third transistor, and the light emitting control sub-circuit comprises a fifth transistor and a sixth transistor;
a control electrode of the first transistor is electrically connected with the first reset signal terminal, a first electrode of the first transistor is electrically connected with the first initial signal terminal, and a second electrode of the first transistor is electrically connected with the first node;
a control electrode of the second transistor is electrically connected with the scanning signal terminal, a first electrode of the second transistor is electrically connected with the first node, and a second electrode of the second transistor is electrically connected with the third node;
a control electrode of the third transistor is electrically connected with the first node, a first electrode of the third transistor is electrically connected with the second node, and a second electrode of the third transistor is electrically connected with the third node;
a control electrode of the fourth transistor is electrically connected with the scanning signal terminal, a first electrode of the fourth transistor is electrically connected with the data signal terminal, and a second electrode of the fourth transistor is electrically connected with the second node;
a control electrode of the fifth transistor is electrically connected with the light emitting signal terminal, a first electrode of the fifth transistor is electrically connected with the first power supply terminal, and a second electrode of the fifth transistor is electrically connected with the second node;
a control electrode of the sixth transistor is electrically connected with the light emitting signal terminal, a first electrode of the sixth transistor is electrically connected with the third node, and a second electrode of the sixth transistor is electrically connected with the fourth node; and
the first plate of the capacitor is electrically connected with the first node, and the second plate of the capacitor is electrically connected with the first power supply terminal.