US 12,229,945 B2
Wafer bin map based root cause analysis
Tomonori Honda, Santa Clara, CA (US); Lin Lee Cheong, San Jose, CA (US); Richard Burch, McKinney, TX (US); Qing Zhu, Rowlett, TX (US); Jeffrey Drue David, San Jose, CA (US); and Michael Keleher, Seattle, WA (US)
Assigned to PDF Solutions, Inc., Santa Clara, CA (US)
Filed by PDF Solutions, Inc., Santa Clara, CA (US)
Filed on Aug. 3, 2023, as Appl. No. 18/365,157.
Application 18/365,157 is a continuation of application No. 17/246,397, filed on Apr. 30, 2021, granted, now 11,763,446.
Claims priority of provisional application 63/018,884, filed on May 1, 2020.
Prior Publication US 2023/0377132 A1, Nov. 23, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06V 10/74 (2022.01); G06F 11/07 (2006.01); G06T 7/00 (2017.01)
CPC G06T 7/001 (2013.01) [G06F 11/079 (2013.01); G06T 2207/30148 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method, comprising:
receiving at least a first wafer bin map associated with a first wafer from a current production run, the first wafer bin map characterized as having a current defect;
identifying a first product flow for making the first wafer;
retrieving a first set of prior wafer bin maps obtained from at least one prior production run that made wafers using the identified first product flow;
analyzing the current defect on the first wafer bin map on the basis of comparison with the first set of prior wafer bin maps; and
assigning a root cause associated with at least one of the first set of prior wafer bin maps to the defect on the first wafer bin map when the first wafer bin map is determined to be similar to the at least one of the prior wafer bin maps.