	US 12,229,866 B2
	Block matching window search instruction using a graphics processing unit (GPU) texture pipeline
Elina Kamenetskaya, Belmont, MA (US); Liang Li, San Diego, CA (US); Jonathan Wicks, Superior, CO (US); and Samuel Benjamin Holmes, Sterling, MA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Jan. 17, 2023, as Appl. No. 18/155,679.
Prior Publication US 2024/0242417 A1, Jul. 18, 2024
Int. Cl. G06T 15/00 (2011.01); G06F 7/57 (2006.01)

CPC G06T 15/005 (2013.01) [G06F 7/57 (2013.01); G06T 2210/52 (2013.01)]

27 Claims

1. An apparatus for graphics processing, comprising:

a memory; and

at least one processor coupled to the memory and, based at least in part on information stored in the memory, the at least one processor is configured to:

obtain a first indication of a first image including a set of first image sections and a second indication of a second image including a set of second image sections, wherein each of the set of first image sections includes a plurality of first subsections, and wherein each of the set of second image sections includes a plurality of second subsections;

compare one first image section in the set of first image sections with one second image section in the set of second image sections, wherein the one first image section is positioned at different locations when compared with the one second image section, such that one first subsection of the plurality of first subsections in the one first image section is compared with multiple second subsections of the plurality of second subsections in the one second image section;

calculate a magnitude of difference between the one first subsection of the plurality of first subsections and each of the multiple second subsections of the plurality of second subsections;

output a third indication of at least one of: (1) a lowest magnitude of difference between the one first subsection of the plurality of first subsections and each of the multiple second subsections of the plurality of second subsections or (2) a set of coordinates for a second subsection in the multiple second subsections of the plurality of second subsections that corresponds to the lowest magnitude of difference to reduce memory throughput and improve performance of a graphics processing unit (GPU); and

skip comparing the one first subsection in the plurality of first subsections with at least one second subsection in the plurality of second subsections.