| CPC G06T 1/20 (2013.01) [G06F 9/3856 (2023.08); G06T 15/005 (2013.01); G06T 17/10 (2013.01)] | 20 Claims |

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1. A graphics processing unit configured to process graphics data using a rendering space which is sub-divided into a plurality of tiles, the graphics processing unit comprising:
a plurality of processing cores configured to render graphics data;
cost indication logic configured to obtain, for each set of one or more tiles of a plurality of sets of one or more tiles of the rendering space, a cost indication from the set of one or more tiles, wherein the cost indication is a parameter which provides some measure of a likely cost of processing the set of one or more tiles;
similarity indication logic configured to obtain similarity indications between sets of one or more tiles of the plurality of sets of one or more tiles of the rendering space, wherein the similarity indication between two sets of one or more tiles is indicative of a level of similarity between the two sets of tiles according to at least one processing metric; and
scheduling logic configured to assign the sets of one or more tiles to the processing cores for rendering in dependence on the cost indications and the similarity indications;
wherein the scheduling logic is configured to:
assign the next set of one or more tiles to the processing cores according to a first scheduling order set by the cost indications if the similarity indications for the set of one or more tiles most recently assigned to the processing cores does not indicate that there is a level of similarity above a specified threshold between that set of one or more tiles and another set of one or more tiles yet to be assigned to the processing cores; and
if the similarity indications for the set of one or more tiles most recently assigned to the processing cores indicates there is a level of similarity above the specified threshold between that set of one or more tiles and one or more other sets of one or more tiles yet to be assigned to the processing cores, assign as the next set of one or more tiles to the processing cores one of those other sets of one or more tiles.
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