US 12,229,436 B2
Memory controller comprising multiple buffer memories, and handling of read after write hazards
Ha-Neul Jeong, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jan. 11, 2022, as Appl. No. 17/572,931.
Claims priority of application No. 10-2021-0055471 (KR), filed on Apr. 29, 2021.
Prior Publication US 2022/0350528 A1, Nov. 3, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0656 (2013.01) [G06F 3/0613 (2013.01); G06F 3/0634 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory storage device comprising:
a memory controller configured to receive data from an outer device; and
a nonvolatile memory connected to the memory controller,
wherein the memory controller comprises:
a first buffer memory configured to store the data;
a second buffer memory different from the first buffer memory; and
a memory interface configured to provide the data provided from the first buffer memory to the nonvolatile memory,
wherein the nonvolatile memory is configured to store the data, and provide a write done signal to the memory interface after storing the data, and
wherein the memory controller is configured to:
copy the data stored in the first buffer memory to the second buffer memory and store a registration timestamp associated with the data, in response to the write done signal; and
remove the data stored in the first buffer memory and update the registration timestamp associated with the data based on the write done signal and a copy done signal indicating that the data stored in the first buffer memory has been copied to the second buffer memory.