US 12,229,412 B2
Memory system managing counters
Kazuhiro Fukutomi, Yokohama Kanagawa (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Feb. 28, 2023, as Appl. No. 18/176,446.
Prior Publication US 2024/0004555 A1, Jan. 4, 2024
Int. Cl. G06F 3/06 (2006.01); G06F 12/0802 (2016.01)
CPC G06F 3/0616 (2013.01) [G06F 3/0653 (2013.01); G06F 3/0679 (2013.01); G06F 12/0802 (2013.01); G06F 2212/304 (2013.01); G06F 2212/45 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system comprising:
a nonvolatile memory that includes a plurality of regions;
a volatile memory; and
a controller that is connected to the nonvolatile memory and the volatile memory, wherein the controller is configured to:
store in the volatile memory a plurality of first counter values each indicating the number of times each of the plurality of regions has been accessed, and a plurality of second counter values respectively corresponding to the plurality of first counter values and indicating differences between values of the plurality of first counter values currently most recently non-volatilized to the nonvolatile memory, and
write the first counter value of a first region of the plurality of regions to the nonvolatile memory in response to the second counter value of the first region being equal to or more than a threshold value.