CPC G06F 21/72 (2013.01) [G06F 9/30101 (2013.01); G06F 21/554 (2013.01); G06F 21/556 (2013.01); G06F 21/602 (2013.01)] | 20 Claims |
1. A co-processor for cryptographic operations, the co-processor being communicatively coupled to an external processing unit, the co-processor comprising:
a set of control registers writable by the external processing unit;
an arithmetic engine to perform a function upon binary data stored within a set of source registers and to store an output of the function in at least one destination register, the function being applied to a respective set of bit sequences stored within the set of source registers that are representative of integer values, the function being selected from a function set comprising one or more of Boolean logic and integer arithmetic;
an address generator to determine a set of source addresses that are used to load binary data from memory into the set of source registers and at least one destination address that is used to store binary data from the at least one destination register in memory; and
control logic to control the operation of the arithmetic engine and the address generator based on values stored in the set of control registers, wherein the control logic is configured to select the function from the function set based on at least one value in the set of control registers.
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