US 12,229,079 B2
Multiple system-on-chip arrangement for vehicle computing systems
Francois Piednoel, Sunnyvale, CA (US)
Assigned to Mercedes-Benz Group AG, Stuttgart (DE)
Filed by Mercedes-Benz Group AG, Stuttgart (DE)
Filed on May 10, 2023, as Appl. No. 18/195,776.
Prior Publication US 2024/0378172 A1, Nov. 14, 2024
Int. Cl. G06F 15/78 (2006.01); G06F 1/30 (2006.01)
CPC G06F 15/7814 (2013.01) [G06F 1/30 (2013.01); G06F 15/7807 (2013.01); G06F 15/781 (2013.01); G06F 15/7825 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A computing system comprising:
a first system on a chip (SoC) comprising a first memory in which the first SoC publishes state information corresponding to a set of tasks being performed by the first SoC, the first SoC comprising a first plurality of computational components; and
a second SoC comprising a second memory and a second plurality of computational components, the second SoC having memory access to the first memory of the first SoC to dynamically read the state information published by the first SoC, wherein the second SoC maintains a subset of the second plurality of computational components in a low power state;
wherein when the second SoC detects a trigger while reading the state information published in the first memory of the first SoC, the second SoC powers the subset of the second plurality of computational components to take over the set of tasks;
wherein each time the computing system is rebooted, the first SoC and the second SoC switch roles in (i) performing the set of tasks versus (ii) placing a subset of their respective plurality of computational components in the low power state and dynamically reading published state information from the first SoC or second SoC.