US 12,229,078 B2
Neural processing unit synchronization systems and methods
Liang Han, Campbell, CA (US); Chengyuan Wu, Fremont, CA (US); and Ye Lu, Shanghai (CN)
Assigned to T-Head (Shanghai) Semiconductor Co., Ltd., Shanghai Free Trade Area (CN)
Appl. No. 18/006,845
Filed by T-Head (Shanghai) Semiconductor Co., Ltd., Shanghai Free Trade Area (CN)
PCT Filed Nov. 2, 2020, PCT No. PCT/CN2020/125818
§ 371(c)(1), (2) Date Jan. 25, 2023,
PCT Pub. No. WO2022/088171, PCT Pub. Date May 5, 2022.
Prior Publication US 2023/0259486 A1, Aug. 17, 2023
Int. Cl. G06F 15/173 (2006.01); G06F 15/167 (2006.01)
CPC G06F 15/17325 (2013.01) [G06F 15/167 (2013.01)] 24 Claims
OG exemplary drawing
 
1. A processing unit, comprising:
a first communication module including circuitry for communicating between a host unit and the processing unit over a first communication network, the processing unit being configurable to receive training information for a machine learning model, using the first communication module, from the host unit;
a communication memory configurable to include multiple partitions;
a core, the processing unit configurable using the training information to generate update information using the core; and
a second communication module including circuitry for communicating between the processing unit and at least one second processing unit over a second communication network using the multiple partitions and at least one serialization unit, the second communication network being separate from the first communication network, the processing unit configurable using the training information to transmit first synchronization information for updating the machine learning model to the at least one second processing unit, the first synchronization information including or based on the update information.