US 12,229,028 B2
Memory device with failed main bank repair using redundant bank
Qiang Tang, Wuhan (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed by YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed on Jan. 16, 2024, as Appl. No. 18/413,583.
Application 18/413,583 is a continuation of application No. 17/467,190, filed on Sep. 4, 2021, granted, now 11,934,281.
Application 17/467,190 is a continuation of application No. PCT/CN2021/103495, filed on Jun. 30, 2021.
Claims priority of application No. PCT/CN2021/082687 (WO), filed on Mar. 24, 2021; and application No. PCT/CN2021/082696 (WO), filed on Mar. 24, 2021.
Prior Publication US 2024/0152435 A1, May 9, 2024
Int. Cl. G06F 11/00 (2006.01); G06F 11/20 (2006.01); G11C 16/04 (2006.01)
CPC G06F 11/2094 (2013.01) [G06F 11/2043 (2013.01); G11C 16/0483 (2013.01); G06F 2201/85 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
an array of memory cells comprising P groups of banks, each group of banks comprising N main banks and M redundant banks, where each of P, N and M is a positive integer, and N is greater than M;
an input/output (I/O) circuit coupled to the P groups of banks and configured to direct P×N pieces of data to or from P×N working banks, respectively, wherein one of the M redundant banks is coupled with at least two main banks of the N main banks through the I/O circuit; and
an I/O control logic coupled to the I/O circuit and configured to:
in responding to K main banks of the P groups of banks failed, determine the P×N working banks comprising K redundant banks of P×M redundant banks, where K is a positive integer not greater than P; and
control the I/O circuit to direct P×N pieces of data to or from the P×N working banks, respectively.