| CPC G06F 1/10 (2013.01) [G06F 1/08 (2013.01)] | 20 Claims |
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1. An apparatus comprising:
a clock skew calibration circuit configured to be coupled to a multi-phase clock generator through a plurality of delay lines, wherein a first clock skew calibration unit of the clock skew calibration circuit comprises:
a frequency doubler configured to receive a plurality of multi-phase clock signals and generate a clock signal based on the plurality of multi-phase clock signals;
a frequency divider configured to receive the clock signal and generate a reduced frequency signal based on the clock signal, the reduced frequency signal having a duty cycle indicating a skew of a first multi-phase clock signal; and
a delay line control circuit configured to compare the duty cycle of the reduced frequency signal with a predetermined duty cycle, and generate a first control signal to adjust the skew of the first multi-phase clock signal through adjusting a first delay applied to the first multi-phase clock signal until a calibrated signal of the first multi-phase clock signal is achieved.
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