US 12,228,957 B2
Output detection circuit
Hiroyuki Kimura, Miyagi (JP)
Assigned to WILL SEMICONDUCTOR (SHANGHAI) CO. LTD., Shanghai (CN)
Filed by WILL SEMICONDUCTOR (SHANGHAI) CO. LTD., Shanghai (CN)
Filed on Jan. 17, 2023, as Appl. No. 18/155,490.
Claims priority of application No. 202211607770.3 (CN), filed on Dec. 14, 2022.
Prior Publication US 2024/0201724 A1, Jun. 20, 2024
Int. Cl. G05F 3/26 (2006.01); G05F 1/46 (2006.01)
CPC G05F 3/262 (2013.01) [G05F 1/461 (2013.01)] 2 Claims
OG exemplary drawing
 
1. An output current detection circuit for an output FET that outputs currents in positive and negative directions, the output current detection circuit:
a positive mirror FET, through which a positive mirror current that is proportional to a positive-direction current in the currents of the output FET in positive and negative directions is made to flow;
a first operational amplifier, receiving a constant voltage at one end, receiving an upstream side voltage regarding the positive mirror current of the positive mirror FET at the other end, and outputting a voltage corresponding to the upstream side voltage regarding the positive mirror current of the positive mirror FET by converting an output voltage into a current and feeding back the current to the other end;
a negative mirror FET, through which a negative mirror current that is proportional to a negative-direction current in the currents of the output FET in positive and negative directions is made to flow; and
a second operational amplifier, receiving a constant voltage at one end, receiving an upstream side voltage regarding the negative mirror current of the negative mirror FET at the other end, and outputting a voltage corresponding to the upstream side voltage regarding the negative mirror current of the negative mirror FET by converting an output voltage into a current and feeding back the current to the other end, wherein
a detection value is output based on an output current obtained by adding a positive output current corresponding to the output of the first operational amplifier and a negative output current corresponding to the output of the second operational amplifier.