US 12,228,952 B2
Electronic devices having complementary current mirror circuitry
Milad Darvishi, San Diego, CA (US); and Georgios Palaskas, San Diego, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on May 2, 2022, as Appl. No. 17/734,642.
Prior Publication US 2023/0350443 A1, Nov. 2, 2023
Int. Cl. G05F 1/56 (2006.01); H03H 7/01 (2006.01); H04B 1/04 (2006.01)
CPC G05F 1/56 (2013.01) [H03H 7/0115 (2013.01); H04B 1/04 (2013.01)] 20 Claims
OG exemplary drawing
 
1. Wireless circuitry comprising:
a digital-to-analog converter;
a filter coupled to an output of the digital-to-analog converter; and
a current buffer coupled to the filter, the current buffer including
a first n-type transistor having a source terminal coupled to a ground power supply line, a gate terminal, and a drain terminal coupled to the gate terminal of the first n-type transistor,
a first p-type transistor having a source terminal coupled to a voltage line, a gate terminal, and a drain terminal coupled to the gate terminal of the first p-type transistor and coupled to the drain terminal of the first n-type transistor,
a second n-type transistor having a source terminal coupled to the ground power supply line, a gate terminal shorted to the gate terminal of the first n-type transistor, and a drain terminal, and
a second p-type transistor having a source terminal coupled to the voltage line, a gate terminal shorted to the gate terminal of the first p-type transistor, and a drain terminal coupled to the drain terminal of the second n-type transistor.