| CPC G05B 19/4155 (2013.01) [G06N 20/00 (2019.01); G05B 2219/31368 (2013.01)] | 25 Claims |

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1. An apparatus for coordinated transfer learning, the apparatus comprising:
at least one memory;
instructions in the apparatus; and
processor circuitry to execute the instructions to:
cause performance of an operation by a first machine according to a first configuration, the first configuration including at least one of a first temporal setting or a first electrical setting to be utilized during the performance of the operation;
process a performance metric of the performance of the operation by the first machine to determine whether the performance metric is within a threshold range; and
in response to a determination that the performance metric is not within the threshold range, cause performance of the operation by a second machine according to a second configuration different from the first configuration, the second configuration including at least one of a second temporal setting or a second electrical setting to be utilized during the performance of the operation.
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