US 12,228,598 B2
System and method of measuring capacitance of device-under-test
Mao-Hsuan Chou, Hsinchu County (TW); Ruey-Bin Sheen, Taichung (TW); and Chih-Hsien Chang, New Taipei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Jul. 20, 2022, as Appl. No. 17/813,633.
Prior Publication US 2024/0027504 A1, Jan. 25, 2024
Int. Cl. G01R 27/26 (2006.01); G01R 31/26 (2020.01); G01R 31/28 (2006.01)
CPC G01R 27/2605 (2013.01) [G01R 31/26 (2013.01); G01R 31/2639 (2013.01); G01R 31/2856 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system of measuring capacitance of a device-under-test (DUT), comprising:
a first switch having a first terminal configured to receive a first supply voltage, V1, and a second terminal electrically connected to a first terminal of the DUT;
a second switch having a first terminal electrically connected to the first terminal of the DUT and a second terminal electrically connected to ground; and
a capacitance measurement device configured to provide a first pair of non-overlapping periodic signals with a first frequency, F1, and a second pair of non-overlapping periodic signals with a second frequency, F2, wherein the second frequency is β times the first frequency,
wherein, when the first switch and the second switch receive the first pair of non-overlapping periodic signals, a first current, I1, is transmitted through the first switch and the second switch,
wherein, when the first switch and the second switch receive the second pair of non-overlapping periodic signals, a second current, I2, is transmitted through the first switch and the second switch, and
wherein the measured capacitance of the DUT is calculated based on (I2−I1)/[(β−1)*V1*F1].