Application 90/020,136 is a continuation of application No. 12/541,299, filed on Aug. 14, 2009, granted, now 7,782,087.
Application 12/541,299 is a continuation of application No. 12/082,073, filed on Apr. 7, 2008, granted, now 7,602,214.
Application 12/082,073 is a continuation of application No. 10/526,595, granted, now 7,394,284, previously published as PCT/EP03/09957, filed on Sep. 8, 2003.
Claims priority of application No. 102 41 812 (DE), filed on Sep. 6, 2002; application No. 103 15 295 (DE), filed on Apr. 4, 2003; application No. 103 21 834 (DE), filed on May 15, 2003; and application No. 03019428 (EP), filed on Aug. 28, 2003.
Ex Parte Reexamination Certificate issued on Feb. 10, 2025.
Attention is directed to the decision of IPR2020-00537 (denied on Sept. 10, 2020) relating to this patent. This reexamination may not have resolved all questions raised by this decision. See 37 CFR 1.552(c) for ex parte reexamination and 37 CFR 1.906(c) for inter partes reexamination.
AS A RESULT OF REEXAMINATION, IT HAS BEEN DETERMINED THAT:
The patentability of claims 19 and 49 is confirmed.
Claims 1-3, 9-14, 16-18, 20-22, 24, 26, 30-33, 39-44, 46-48, 50-52, 54, 56 and 60 were previously disclaimed.
Claims 4-8, 15, 23, 25, 27-29, 34-38, 45, 53, 55 and 57-59 were not reexamined.
19. The multi-processor chip according to claim 1, wherein at least one of the memory cells is adapted to store data in a non-volatile manner.