US 11,903,326 B2
SOT-MRAM cell in high density applications
Ming Yuan Song, Hsinchu (TW); and Shy-Jay Lin, Jhudong Township (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Jul. 25, 2022, as Appl. No. 17/872,649.
Application 17/872,649 is a continuation of application No. 16/822,352, filed on Mar. 18, 2020, granted, now 11,469,371.
Claims priority of provisional application 62/893,325, filed on Aug. 29, 2019.
Prior Publication US 2022/0359816 A1, Nov. 10, 2022
Int. Cl. H10N 50/80 (2023.01); G11C 11/16 (2006.01); H10B 61/00 (2023.01); H10N 50/01 (2023.01); H10N 50/10 (2023.01)
CPC H10N 50/80 (2023.02) [G11C 11/161 (2013.01); G11C 11/1657 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); H10B 61/10 (2023.02); H10N 50/01 (2023.02); H10N 50/10 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A memory device comprising:
a spin orbit torque (SOT) layer;
a magnetic tunnel junction (MTJ) structure over the SOT layer;
a first conductive wire below the SOT layer and coupled to the SOT layer;
a second conductive wire over the MTJ structure; and
a selector structure between the first conductive wire and the SOT layer;
wherein the first and second conductive wires have individual lengths extending laterally in parallel, and wherein a bottommost surface of the selector structure overlies a topmost surface of the first conductive wire.