US 11,903,202 B2
Method of manufacturing semiconductor device
Aki Maeda, Yokkaichi (JP); Noritaka Ishihara, Nagoya (JP); Atsushi Fukumoto, Kuwana (JP); and Shuto Yamasaka, Yokkaichi (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Aug. 4, 2021, as Appl. No. 17/393,642.
Claims priority of application No. 2021-046203 (JP), filed on Mar. 19, 2021.
Prior Publication US 2022/0302158 A1, Sep. 22, 2022
Int. Cl. H10B 43/27 (2023.01); H01L 21/225 (2006.01); H01L 21/02 (2006.01)
CPC H10B 43/27 (2023.02) [H01L 21/2254 (2013.01); H01L 21/0217 (2013.01); H01L 21/0262 (2013.01); H01L 21/02211 (2013.01); H01L 21/02271 (2013.01); H01L 21/02532 (2013.01); H01L 21/02592 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
forming a semiconductor layer including a plurality of metal atoms on a substrate;
forming a first layer including a plurality of silicon atoms and a plurality of nitrogen atoms on the semiconductor layer;
transferring at least some of the metal atoms in the semiconductor layer into the first layer; and
removing the first layer after transferring the at least some of the metal atoms in the semiconductor layer into the first layer,
wherein a ratio of a number of the nitrogen atoms relative to a number of the silicon atoms and the nitrogen atoms in the first layer is smaller than 4/7.