CPC H10B 43/27 (2023.02) [H10B 41/27 (2023.02)] | 22 Claims |
1. A microelectronic device, comprising:
a stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers, the stack structure divided into block structures separated from one another by slot structures;
strings of memory cells vertically extending through the block structures of the stack structure, the strings of memory cells individually comprising a channel material vertically extending through the stack structure;
an additional stack structure vertically overlying the stack structure and comprising a vertical sequence of additional conductive structures and additional insulative structures arranged in additional tiers;
first pillars extending through the additional stack structure and vertically overlying the strings of memory cells, each of the first pillars horizontally offset from a center of a corresponding string of memory cells;
second pillars extending through the additional stack structure and vertically overlying the strings of memory cells; and
additional slot structures comprising a dielectric material extending through at least a portion of the additional stack structure and sub-dividing each of the block structures into sub-block structures, the additional slot structures horizontally neighboring the first pillars, a horizontal distance between one of the first pillars and one of the second pillars horizontally neighboring the one of the first pillars less than a horizontal distance between the one of the second pillars and an additional one of the second pillars neighboring the one of the second pillars.
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