CPC H04R 25/502 (2013.01) [H04R 29/00 (2013.01)] | 15 Claims |
1. A system comprising:
a plurality of processing devices arranged for performing an algorithm comprising a plurality of computational tasks, said plurality of processing devices being interconnected with each other,
a control logic module adapted to select an implementation of said algorithm among a plurality of implementations,
wherein at least a part of said control logic module resides in one of said processing devices and
wherein said implementation is selected according to hardware capabilities of the system, allowing a choice between an implementation of said algorithm using signal values in a floating-point representation and an implementation of said algorithm using signal values in a fixed-point representation, and wherein in the selected implementation said plurality of computational tasks of said algorithm is distributed over at least two of said processing devices.
|