| CPC H04N 25/7795 (2023.01) [H04N 23/667 (2023.01); H04N 25/709 (2023.01); H04N 25/20 (2023.01)] | 9 Claims |
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1. A generator of phases of a detector, the generator integrating at least one elementary machine for interpreting a microcode stored in a register, each elementary machine comprising:
at least one control input comprising a logic level change detector;
at least one phase output comprising a controlled switch, enabling to define the logic level of the phase output, and a controlled inverter enabling to toggle the logic level of the phase output;
at least one clock signal associated with a counter;
a unit for loading the instructions and the arguments stored in the register, the instructions being coded over 3 bits and enabling to implement at least:
an application of a logic level onto at least one phase output;
a toggling of the logic level of at least one phase output;
a synchronization with a logic change of a control input;
a wait for a predetermined duration; and
a restarting of a predetermined sequence;
means for inhibiting the loading unit; and
a unit for executing the instructions loaded by the loading unit, the execution unit being configured to:
control the position of at least one controlled switch after an instruction of application;
control the activation of at least one controlled inverter after an instruction to toggle;
detect a logic change after an instruction of synchronization;
control the inhibition of the inhibition means for a duration measured by the counter after a wait instruction; and
control the position of a pointer of the loading unit after a restart instruction.
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