US 11,901,914 B2
Low-density parity-check (LDPC) encoding method and apparatus
Guido Montorsi, Turin (IT); Sergio Benedetto, Turin (IT); Wei Lin, Shenzhen (CN); and Yan Xin, Ottawa (CA)
Assigned to Huawei Technologies Co., Ltd., Shenzhen (CN)
Filed by HUAWEI TECHNOLOGIES CO., LTD., Guangdong (CN)
Filed on Apr. 29, 2022, as Appl. No. 17/732,776.
Application 17/732,776 is a continuation of application No. PCT/CN2020/125484, filed on Oct. 30, 2020.
Claims priority of application No. 201911047476.X (CN), filed on Oct. 30, 2019.
Prior Publication US 2022/0255564 A1, Aug. 11, 2022
Int. Cl. H03M 13/00 (2006.01); H03M 13/11 (2006.01)
CPC H03M 13/1157 (2013.01) [H03M 13/1151 (2013.01); H03M 13/616 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A low-density parity-check (LDPC) encoding method, wherein the method comprises:
obtaining, by a transmit end, k information bits to be sent to a receive end, wherein k is an integer greater than 0;
performing, by the transmit end, LDPC encoding on the k information bits by using a first check matrix based on a first transmission code rate R satisfying R=k/(n+j×Z) to obtain a first codeword, wherein:
the first check matrix is a submatrix of the first ((n—k)/Z+j) rows and the first (n/Z+j) columns in a check matrix H, and a code rate of the first check matrix is equal to the first transmission code rate;
n is an integer greater than 0, j is an integer greater than or equal to 0, and Z is an integer greater than 0;
the check matrix H is a matrix of ((n—k)/Z+Q) rows and (n/Z+Q) columns, Q is an integer greater than or equal to j, each element in the check matrix H represents one Z×Z square submatrix, and the square submatrix is a cyclic permutation matrix of an identity matrix or an all-zero matrix;
the check matrix H comprises a matrix HMC, a matrix HIR of Q rows and 24 columns, an all-zero matrix of 4 rows and Q columns, and an identity matrix of Q rows and Q columns; and
the matrix HMCis a matrix of (n—k)/Z rows and n/Z columns, the matrix HMCis located at an upper left corner of the check matrix H, the matrix HIR of Q rows and 24 columns is located at a lower left corner of the check matrix H, the all-zero matrix of 4 rows and Q columns is located at an upper right corner of the check matrix H, and the identity matrix of Q rows and Q columns is located at a lower right corner of the check matrix H; and
sending, by the transmit end, the first codeword comprising the k information bits and (n—k+j×Z) redundant bits to the receive end.