US 11,901,444 B2
Method for manufacturing semiconductor device
Ryu Kamibaba, Tokyo (JP); Tetsuo Takahashi, Tokyo (JP); and Akihiko Furukawa, Tokyo (JP)
Assigned to Mitsubishi Electric Corporation, Tokyo (JP)
Filed by Mitsubishi Electric Corporation, Tokyo (JP)
Filed on May 3, 2022, as Appl. No. 17/661,843.
Application 17/661,843 is a division of application No. 16/225,186, filed on Dec. 19, 2018, granted, now 11,398,563.
Claims priority of application No. 2018-122257 (JP), filed on Jun. 27, 2018.
Prior Publication US 2022/0262934 A1, Aug. 18, 2022
Int. Cl. H01L 29/739 (2006.01); H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 27/06 (2006.01); H01L 21/04 (2006.01)
CPC H01L 29/7397 (2013.01) [H01L 21/0465 (2013.01); H01L 27/0629 (2013.01); H01L 29/083 (2013.01); H01L 29/7813 (2013.01)] 2 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor device, comprising:
forming a collector layer of a transistor region, on a side of a lower surface of a semiconductor substrate; and
forming a cathode layer of a diode region adjacent to the transistor region, on the side of the lower surface of the semiconductor substrate, wherein,
in the formation of the cathode layer, ion injection is performed on the lower surface of the semiconductor substrate using a resist mask that covers at least a part of a lower surface of the transistor region and has opening density decreasing toward the transistor region in an adjacent region which is on a lower surface of the diode region and is adjacent to the transistor region.