US 11,901,352 B2
Dual-port SRAM structure
Jhon Jhy Liaw, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 7, 2022, as Appl. No. 17/811,260.
Application 17/811,260 is a continuation of application No. 16/932,394, filed on Jul. 17, 2020, granted, now 11,444,072.
Claims priority of provisional application 62/981,317, filed on Feb. 25, 2020.
Prior Publication US 2022/0336438 A1, Oct. 20, 2022
Int. Cl. H01L 27/02 (2006.01); H01L 27/092 (2006.01); H10B 10/00 (2023.01)
CPC H01L 27/0207 (2013.01) [H01L 27/0924 (2013.01); H10B 10/12 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A device structure, comprising:
a substrate comprising an n-well disposed between a first p-well and a second p-well along a first direction;
a first active region and a second active region disposed over the n-well and extending along a second direction perpendicular to the first direction;
a third active region and a fourth active region disposed over the first p-well and extending along the second direction;
a fifth active region and a sixth active region disposed over the second p-well and extending along the second direction;
a first gate structure extending along the first direction to wrap over the third active region, the fourth active region, and the first active region; and
a second gate structure extending along the first direction to wrap over the second active region, the fifth active region, and the sixth active region.