US 11,901,323 B2
Semiconductor packages having conductive pillars with inclined surfaces
Chiang-Jui Chu, Yilan County (TW); Ching-Wen Hsiao, Hsinchu (TW); Hao-Chun Liu, Hsinchu (TW); Ming-Da Cheng, Taoyuan (TW); Young-Hwa Wu, Tainan (TW); and Tao-Sheng Chang, Tainan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jun. 16, 2022, as Appl. No. 17/841,683.
Application 17/841,683 is a continuation of application No. 16/866,562, filed on May 5, 2020, granted, now 11,398,444.
Claims priority of provisional application 62/893,778, filed on Aug. 29, 2019.
Prior Publication US 2022/0310543 A1, Sep. 29, 2022
Int. Cl. H01L 23/00 (2006.01); H01L 25/065 (2023.01); H01L 25/00 (2006.01)
CPC H01L 24/13 (2013.01) [H01L 24/05 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/13017 (2013.01); H01L 2224/1355 (2013.01); H01L 2224/16059 (2013.01); H01L 2924/37001 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a first conductive pillar, wherein the first conductive pillar has a first sidewall, a second sidewall opposite to the first sidewall, a first surface and a second surface physically connected to the first surface, the first surface and the second surface are disposed between the first sidewall and the second sidewall, and an included angle is formed between the first surface and the second surface, wherein a height of the first sidewall is greater than a height of the second sidewall;
a conductive pad; and
a solder region disposed between and in direct contact with the first conductive pillar and the conductive pad, wherein the solder region has a first convex sidewall on the second sidewall of the first conductive pillar.